The present invention relates to an operational amplifier, and more particularly, to an operational amplifier having an output circuit that uses a bipolar transistor.
There is a demand for decreasing the power supply voltage and power consumption of semiconductor devices used in electronic equipment. Accordingly, it is required that such semiconductor device employ an operational amplifier (op amp) that efficiently amplifies signals.
FIG. 1 is a schematic circuit diagram of a prior art op amp 100. A first input signal IN1 is provided to the base of a PNP transistor Tr1, and a second input signal IN2 is provided to the base of a PNP transistor Tr2. The collectors of the transistors Tr1, Tr2 are connected to the collectors of NPN transistors Tr3, Tr4, respectively. The NPN transistors Tr3, Tr4 configure a current mirror circuit.
When the voltage of the second input voltage IN2 is greater than that of the first input signal IN1, the collector current of the transistor Tr2 decreases. This decreases the base current and the collector current of an NPN transistor Tr5.
When the voltage of the second input voltage IN2 is less than that of the first input signal IN1, the collector current of the transistor Tr2 increases. This increases the base current and the collector current of the transistor Tr5.
When the collector current of the transistor Tr5 decreases, the base current and collector current of a first output transistor Tr6, which is an NPN transistor, increases. Further, the base current and collector current of a PNP transistor Tr7 decreases.
When the collector current of the transistor Tr5 increases, the base current and collector current of the first output transistor Tr6 decreases. Further, the base current and collector current of the PNP transistor Tr7 increases.
When the collector current of the transistor Tr7 increases, the base current and collector current of a second output transistor Tr8, which is an NPN transistor, increases. Further, when the collector current of the transistor Tr7 decreases, the base current and collector current of the second output transistor Tr8 decreases. Since the first and second output transistors Tr6, Tr8 are both NPN transistors, a quasi-complementary circuit configures an output circuit of the op amp 100.
The collector current of the transistor Tr7 is the collector current of an NPN transistor Tr9. An idling current setting circuit, which includes transistors Tr10–Tr12 and a resistor R, controls the base current of the transistor Tr9.
The idling current setting circuit receives the output voltage Vo. When the output voltage Vo increases, the idling current setting circuit functions to increase the base current and collector current of the transistor Tr9. When the output voltage Vo decreases, the idling current setting circuit functions to decrease the base current and the collector current of the transistor tr9.
The base voltage of the transistor Tr9 is the sum of the output voltage Vo and the base-emitter voltages VBE6, VBE7, VB9 of the transistors Tr6, Tr7, Tr9. The base voltage of the transistor Tr9 is also the sum of the output voltage Vo and the base-emitter voltages VBE10, VBE11, VBE12 of the transistors Tr10–Tr12. Accordingly, the base-emitter voltage VBE10 of the transistor Tr10 is substantially the same as the base-emitter voltage VBE6 of the transistor Tr6.
When the input signals IN1, IN2 increase the collector current of the transistor Tr5, the collector current of the first output transistor Tr6 decreases, the collector current of the second output transistor Tr8 increase, and the output voltage Vo decreases.
When the input signals IN1, IN2 decrease the collector current of the transistor Tr5, the collector current of the first output transistor Tr6 increases, the collector current of the second output transistor Tr8 decrease, and the output voltage Vo increases.
The base-emitter voltage VBE10 of the transistor Tr10 sets the idling current (bias current) Id, which flows through the output transistor Tr6. The collector current of the transistor TR10 sets the idling current of the transistor Tr8.
When allowable supply currents I1, I2 of current sources 1a, 1b are the same, the idling current Id that flows from the power supply Vcc to the ground GND via the output transistors Tr6, Tr8 is represented by the following equation. In the equation, Q6, Q7, Q9, Q10, Q11, and Q12 respectively represent the size of the transistors Tr6, Tr7, Tr9, Tr10, Tr11, and Tr12.Id=I2×Q9/Q12×Q7/Q11×Q6/Q10
The second output transistor Tr8 is an NPN transistor. Thus, the minimum output voltage VoL may be decreased to substantially the level of the ground GND. However, the voltage difference between the output voltage Vo and the power supply voltage (Vcc) must be greater than the sum of the base-emitter voltages VBE10, VBE11, VBE12 to have the idling current setting circuit function normally. Thus, the maximum output voltage VoH cannot be increased to the power supply voltage.
The idling current Id must be decreased to decrease power consumption. To decrease the idling current Id, the supply current I2 of the current source 1b may be decreased. However, a decrease in the supply current I2 would decrease the maximum output current of the second output transistor Tr8 and reduce load driving capacity.
To increase the load driving capacity by increasing the output current of the first output transistor Tr6, the first output transistor Tr6 may be Darlington-connected. However, a diode-connected transistor must be arranged between the bases of the first output transistor Tr6 and the transistor Tr7 to equalize the base-emitter voltage of a Darlington-connected first output transistor with the base-emitter voltage VBE10. In such case, the supply current I1 of the current source 1a would affect the value of the base-emitter voltage of the first output transistor Tr6. Further, differences between Darlington-connected first output transistors would increase fluctuations of the idling current Id.
When a complementary circuit is employed as the output circuit (i.e., the second output transistor Tr8 being a PNP transistor), a base-emitter voltage VBE of the first output transistor (NPN transistor) Tr6 would exist between the power supply Vcc and the maximum output voltage VoH. Further, a base-emitter voltage VBE of the second output transistor (PNP transistor) Tr8 would exist between the minimum output voltage VoL and the ground GND. Accordingly, the range of the output voltage Vo may not be sufficient.